/* Ivy Bridge */
case 0x3A: /* IVB */
case 0x3E: /* IVB Xeon */
+ case 0x55: /* SKX,CLX Xeon */
+ case 0x6A: /* ICX Xeon */
do_smi = true;
do_core_cstate = (1 << 3) | (1 << 6) | (1 << 7);
do_pkg_cstate = (1 << 2) | (1 << 3) | (1 << 6) | (1 << 7);
break;
case 0x2D: /* SNB Xeon */
case 0x3E: /* IVB Xeon */
+ case 0x55: /* SKX,CLX Xeon */
+ case 0x6A: /* ICX Xeon */
do_rapl = RAPL_PKG | RAPL_CORES | RAPL_DRAM;
do_power_fields = TURBO_PLATFORM | PSTATES_PLATFORM;
break;